1. Field
The described embodiments relate to computing devices. More specifically, the described embodiments relate to using redundant transactions to verify the correctness of program code execution in computing devices.
2. Related Art
Many modern computing devices include a graphics processing unit (GPU) with processing circuits that are optimized for performing operations related to graphics processing. In some of these computing devices, the GPU can also be configured to offload certain types of computational operations from other entities in the computing device. For example, in some computing devices, upon encountering certain types of single-instruction-multiple-data (SIMD) operations when executing program code, a central processing unit (CPU) forwards the SIMD operations to the GPU. The GPU performs the SIMD operations (in some cases, more efficiently than the CPU due to the configuration of the processing circuits in the GPU) and returns results from the SIMD operations to the CPU, where the results can be used in subsequent operations.
Despite having this capability, a small possibility of undetected faults in some GPUs means that, in certain situations, the GPUs are unable to be used to offload computational operations from other entities in the computing device. For example, in some GPUs, faults during computational operations that are caused by physical anomalies (e.g., bit-flips caused by environmental variances such as electromagnetic fields, electromagnetic particle impacts, circuit errors, etc.) may be undetected. Thus, the GPUs may not be used for offloading computational operations in computing devices where high performance and/or high reliability are necessary and/or in environments where such faults are more likely.